The present invention relates to a semiconductor device.
In related-art technology, when disposing a semiconductor element such as a MOS transistor under a pad, the characteristics of the semiconductor element may be impaired due to stress during bonding. Therefore, the pad formation region and the semiconductor element formation region are separately provided in a semiconductor chip when viewed from the top side. However, since the semiconductor chip has been reduced in size and increased in degree of integration, disposition of the semiconductor element under the pad has been in demand. JP-A-2002-319587 discloses such technology, for example.